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LT1950 Single Switch PWM Controller with Auxiliary Boost Converter DESCRIPTIO
The LT(R)1950 is a wide input range, forward, boost, flyback and SEPIC controller that drives an N-channel power MOSFET with few external components required. A resistor programmable duty cycle clamp can be used to generate a volt-second clamp for forward converter applications. An internal boost switcher is available for creating a separate supply for the output gate driver, allowing 10V gate drive from input voltages as low as 3V. The LT1950's operating frequency can be set with an external resistor over a 100kHz to 500kHz range and a SYNC pin allows the part to be synchronized to an external clock. Additional programmability exists for leading edge blanking and slope compensation. A fast current sense comparator achieves 60ns current sense delay and the error amplifier is a true voltage mode error amplifier, allowing a wide range of compensation networks. An accurate shutdown pin with programmable hysteresis is available for undervoltage lockout and shutdown. The LT1950 is available in a small 16-Pin SSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
FEATURES
s s s s
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Wide Input Range: 3V to 25V Programmable Volt-Second Clamp Output Power Levels from 25W to 500W Auxiliary Boost Converter Provides 10V Gate Drive from VIN as Low as 3V Programmable Operating Frequency (100kHz to 500kHz) with One External Resistor Programmable Slope Compensation Programmable Leading Edge Blanking 2% Internal 1.23V Reference Accurate Shutdown Pin Threshold with Programmable Hysteresis 60ns Current Sense Delay 2.5V Auxiliary Reference Output Synchronizable to an External Clock up to 1.5 * fOSC Current Mode Control Small 16-Pin SSOP Package
APPLICATIO S
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Telecom Power Supplies Automotive Power Supplies Portable Electronic Equipment Isolated and Nonisolated DC/DC Converters
TYPICAL APPLICATIO
36V to 72V DC to 26V/5A (Single Switch) Forward Converter
10VBIAS SLOPE 2.5V 0.1F 249k VREF BOOST ROSC VIN VIN2 VSEC SHDN 1F 18k Si7450 470k 47F VIN
MBRB20200
47H
VOUT 26V 5A
EFFICIENCY (%)
LT1950 BLANK SYNC GND FB GATE ISENSE PGND COMP 4.7k 0.015
4.99k
0.022F
100k
1950 TA01a
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95 90 85 80 75
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Efficiency vs Load Current
VIN = 36V VIN = 48V VIN = 72V
70 0.5
1.5
3.5 4.5 2.5 LOAD CURRENT (A)
5.5
1950 TA01b sn1950 1950fs
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LT1950
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW COMP 1 FB 2 ROSC 3 SYNC 4 SLOPE 5 VREF 6 SHDN 7 GND 8 16 VSEC 15 VIN 14 BOOST 13 PGND 12 GATE 11 VIN2 10 ISENSE 9 BLANK
BOOST ....................................................... -0.3V to 35V VIN, VIN2, SHDN ......................................... -0.3V to 25V FB, SYNC, VSEC ........................................... -0.3V to 6V COMP, BLANK .......................................... -0.3V to 3.5V SLOPE ...................................................... -0.3V to 2.5V ISENSE ......................................................... -0.3V to 1V ROSC .................................................................... -50A VREF .................................................................... -10mA Operating Junction Temperature Range LT1950EGN/LT1950IGN (Notes 2, 5) ... - 40C to 125C Storage Temperature Range ..................-65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LT1950EGN LT1950IGN
GN PART MARKING 1950E 1950I
GN PACKAGE 16-LEAD NARROW PLASTIC SSOP
TJMAX = 125C, JA = 110C/W, JC (PIN 8) = 30C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1F, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified.
PARAMETER PWM Controller Operating Input Voltage Minimum Start-Up Voltage VIN Quiescent Current VIN Shutdown Current Shutdown Threshold Shutdown Pin Current Shutdown Pin Current Hysteresis VIN2 Quiescent Current VIN2 Shutdown Current VREF (External Output) Output Voltage Line Regulation Load Regulation Oscillator Frequency: fOSC Minimum Programmable fOSC Maximum Programmable fOSC SYNC Input Resistance SYNC Switching Threshold SYNC Frequency/fOSC fOSC Line Reg VROSC (ROSC = 249k, fOSC =200kHz), FB = 1V (Note 7) 3V < VIN < 25V 9.5V < VIN2 < 25V ROSC = 249k, FB = 1V ROSC = 499k ROSC = 90.9k
q
ELECTRICAL CHARACTERISTICS
CONDITIONS IVREF = 0A IVREF = 0A IVREF = 0A, FB = 1V, ISENSE = 0.2V SHDN = 0V 3V < VIN < 25V SHDN = 70mV Above Threshold SHDN = 100mV Below Threshold I(VREF) = 0A, FB = 1V, ISENSE = 0.2V SHDN = 0V, VIN2 = 2.7V (Boost Diode from VIN = 3V) IVREF = 0A IVREF = 0A, 3V < VIN < 25V 0A < IVREF < 2.5mA
q q q q
MIN 3.0
TYP
MAX 25
UNITS V V mA A V A A mA A V mV mV kHz kHz kHz k V %/V %/V V
sn1950 1950fs
2.6 2.3 5 1.261 -7 4 1.32 -10 7 1.7 500 2.425 2.500 1 1 170 85 440 200 100 500 20 1.5 1.25 0.05 0.05 1
3.0 3.0 20 1.379 -13 10 2.5 700 2.575 5 5 230 115 560 2.2 1.5 0.15 0.25
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The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1F, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified.
PARAMETER Error Amplifier FB Reference Voltage FB Input Bias Current Open Loop Voltage Gain Unity Gain Bandwidth COMP Source Current COMP Sink Current COMP High Level: VOH COMP Active Threshold COMP Low Level: VOL Current Sense ISENSE Maximum Threshold ISENSE Input Bias Current Default Blanking Time Adjustable Blanking Time Blanking Override Voltage- ISENSE Maximum Threshold Turn-Off Delay to Gate Slope Compensation (Note 4) Duty Cycle < 10%, COMP = VOH COMP = 2.5V, ISENSE = ISENSE Max Threshold FB = 1V, COMP = 2V, ISENSE = 75mV FB = 1V, COMP = 2V, ISENSE = 75mV BLANK = 75k to Ground BLANK = Open, COMP = 2.5V (Note 4) COMP = 2V ISENSE Max Threshold (DC < 10%) - (DC = 80%) (Note 4) Default, RSLOPE = 2x Default, RSLOPE = 8k 3x Default, RSLOPE = 3.3k VIN2 = 8V, 3V < VIN < 10V VIN2 = 8V, 3V < VIN < 10V 3V < VIN < 10V 3V < VIN < 10V 3V < VIN < 10V, FB = 1V (Note 4) 3V < VIN < 10V, FB = 1V (Note 4) FB = 1V, VIN2 = 12V, CL = 1nF (Notes 3, 6) FB = 1V, VIN2 = 12V, CL = 1nF (Notes 3, 6) IGATE = 0A, COMP = 2.5V, FB = 6V IGATE = 20mA IGATE = 200mA IGATE = -20mA, VIN2 = 12V, COMP = 2.5V, FB = 6V IGATE = -200mA, VIN2 = 12V, COMP = 2.5V, FB = 6V FB = 1V, fOSC = 200kHz 10 9.75 90 95 97 11.5
q q
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
q
TYP 1.230 -75 85 3 -1.1 13 2.5 1.0 0.15
MAX 1.254 -200
UNITS V nA dB MHz
3V < VIN < 25V, VOL + 0.2V < COMP < VOH - 0.2 FB = FB Reference Voltage VOL + 0.2V < COMP < VOH - 0.2 (Note 6) FB = 1V, COMP = 1.6V FB = 1.4V, COMP = 1.6V FB = 1V, ICOMP = - 250A Start of GATE Switching (Duty Cycle > 0%) FB = 1.4V, ICOMP = 250A
1.205 65
q
-0.3 8
-1.8
mA mA V V V
90 -125
100 -170 110 290
110 -250
mV A ns ns
15
25 60 14 28 42
40
mV ns mV mV mV
Internal Switcher Boost Switch ILIMIT Boost Switch Off Time VIN2: Boost Disable VIN2: Boost Disable Hysteresis VIN2: Gate Enable VIN2: Gate Enable Hysteresis GATE Driver Output GATE Rise Time GATE Fall Time GATE Clamp Voltage GATE Low Level GATE High Level Maximum Duty Cycle 50 30 13 0.25 1.2 14.5 0.4 1.75 ns ns V V V V V % 70 250 9.5 7.0 125 500 11.0 -1.0 8.2 -0.6 9.27 180 1000 11.75 mA ns V V V V
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LT1950
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1F, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified.
PARAMETER Maximum Duty Cycle Clamp VSEC Input Bias Current CONDITIONS VSEC = 1.4V, FB = 1V, COMP = VOH 0V < VSEC < 2.8V MIN 63 TYP 75 -0.3 MAX 87 -1.0 UNITS % A
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1950EGN is guaranteed to meet performance specifications from 0C to 125C operating junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT1950IGN is guaranteed over the full -40C to 125C operating junction temperature range. Note 3: Rise and Fall times are between 10% and 90% levels.
Note 4: Guaranteed by correlation to static test. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 6: Guaranteed but not tested. Note 7: Maximum recommended SYNC frequency = 500kHz.
TYPICAL PERFOR A CE CHARACTERISTICS
FB Voltage vs Temperature
1.26 1.25
FB VOLTAGE (V)
1.24 1.23 1.22 1.21 1.20 -50 -25
210 200 190 180 170
VIN SHUTDOWN IQ (A)
FREQUENCY (kHz)
50 25 75 0 TEMPERATURE (C)
Shutdown Threshold vs Temperature
1.45 125
MAXIMUM ISENSE THRESHOLD (mV)
SHUTDOWN THRESHOLD (V)
1.40
110 105 100 95 90 85 80 75 -50 -25 50 0 75 25 TEMPERATURE (C) 100 125
ISENSE CURRENT (A)
1.35
1.30
1.25
1.20 -50
-25
50 25 75 0 TEMPERATURE (C)
4
UW
100
1950 G01
Switching Frequency vs Temperature
240 230 220 16 14 12 10 8 6 4 2 -25 50 25 75 0 TEMPERATURE (C) 100 125
VIN Shutdown IQ vs Temperature
SHDN = 0V
125
160 -50
0 -50
-25
50 25 75 0 TEMPERATURE (C)
100
125
1950 * G02
1950 * G03
Maximum ISENSE Threshold vs Temperature
270 250 230 210 190 170 150 130 110
ISENSE Pin Current vs Temperature
120 115
100
125
90 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
1950 * G04
1950 G05
1950 G06
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LT1950 TYPICAL PERFOR A CE CHARACTERISTICS
BLANK Override Threshold - ISENSE Maximum Threshold vs Temperature
40 MINIMUM VIN START-UP VOLTAGE (V) BLANK OVERRIDE THRESHOLD -ISENSE MAXIMUM THRESHOLD (mV) 35 30 25 20 15 10 -50 -25 3.00
VIN IQ (mA)
50 25 75 0 TEMPERATURE (C)
SHDN Input Current *(-1) vs Temperature
14 SHDN INPUT CURRENT*(-1) (A) 12 SHDN = SHDN THRESHOLD + 70mV 10 8 6 4 2 0 -50 -25 SHDN = SHDN THRESHOLD - 100mV SHDN CURRENT HYSTERESIS (A) 11 10
GATE RISE/FALL TIME (ns)
50 25 75 0 TEMPERATURE (C)
VIN2: GATE Enable vs Temperature
9.2 13.0 12.5 VIN2 GATE ENABLE (V) 8.7 GATE ENABLE 8.2 HYSTERESIS 7.7 GATE DISABLE 7.2 -50 -25 12.0 11.5
BOOST SWITCH ILIMIT (mA)
VIN2 BOOST DISABLE (V)
50 25 75 0 TEMPERATURE (C)
UW
100
1950 G07
Minimum VIN Start-Up Voltage vs Temperature (VIN2 Boosted)
3.1 2.9 2.75 2.7 2.5 2.3 2.1 1.9 1.7 2.00 -50 -25 0 25 50 75 100 125
VIN IQ vs Temperature
2.50
2.25
125
1.5 -50 -25
0
25
50
75
100
125
TEMPERATURE (C)
1950 G08
TEMPERATURE (C)
1950 G09
SHDN Current Hysteresis vs Temperature
125
GATE Rise/Fall Time vs GATE Capacitance
TA = 25C
100
9 8 7 6 5 4 3 -50 -25
tr
75
tf
50
25
0 0 25 50 75 100 125 0 TEMPERATURE (C) 1000 3000 4000 2000 GATE CAPACITANCE (pF) 5000
1950 G12
100
125
1950 G10
1950 G11
VIN2: BOOST Disable vs Temperature
250
BOOST Switch ILIMIT vs Temperature
200
BOOST DISABLE 11.0 10.5 10.0 9.5 BOOST RE-ENABLE HYSTERESIS
150
100
100
125
9.0 -50
-25
50 25 75 0 TEMPERATURE (C)
100
125
50 -50 -25
50 25 75 0 TEMPERATURE (C)
100
125
1950 G13
1950 G14
1950 G15
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LT1950 TYPICAL PERFOR A CE CHARACTERISTICS
BOOST Switch Off Time vs Temperature
700 100 90 MAX DUTY CYCLE = (105/VSEC)% 1.25V < VSEC < 2.8V TA = 25C
BOOST SWITCH OFF TIME (ns)
MAXIMUM DUTY CYCLE (%)
600
80 70 60 50 40
GATE CLAMP VOLTAGE (V)
500
400
300 -50 -25
50 25 75 0 TEMPERATURE (C)
PI FU CTIO S
COMP (Pin 1): The COMP pin is the output of the error amplifier. The error amplifier is a true op amp which allows the use of an RC network to be connected between the Comp and FB pins to compensate the feedback loop for optimum transient response. The peak switch current in the external MOSFET will be proportional to the voltage on the COMP pin. Typical operating voltage range for this pin is 1V to 2.5V. FB (Pin 2): The FB pin is the inverting input to the error amplifier. The output voltage is set with a resistor divider. The error amplifier adjusts the peak switch current to maintain the FB pin voltage at the value of the internal reference voltage of 1.23V. ROSC (Pin 3): A resistor from the ROSC pin to ground programs the operating frequency of the LT1950. Operating frequency range is 100kHz to 500kHz. Nominal voltage on the ROSC pin is 1V. SYNC (Pin 4): The SYNC pin is used to synchronize the internal oscillator to an external clock signal. The pin is directly logic compatible and can be driven with any signal with a duty cycle of 10% to 90%. If the SYNC function is not used the pin can be left open circuit or connected to ground. SLOPE (Pin 5): The SLOPE pin is used to adjust the amount of slope compensation. Leaving the pin open circuit results in a default level of slope compensation. The amount of slope compensation can be adjusted above this default level by connecting a resistor from the SLOPE pin to the VREF pin. VREF (Pin 6): The VREF pin is the output of an internal 2.5V reference. This pin is capable of sourcing up to 2.5mA for external use. It is recommended that the VREF pin is bypassed to ground with a 0.1F ceramic capacitor. SHDN (Pin 7): The SHDN pin is used to put the device into a low power shutdown state. In shutdown the VIN supply current drops to 5A. The SHDN pin has an accurate threshold of 1.32V which can be used to program an undervoltage lockout threshold. Input current levels on the SHDN pin can be used to program hysteresis into the undervoltage lockout levels. GND (Pin 8): The GND pin is the analog ground for the internal circuitry of the LT1950. Sensitive circuitry such as the feedback divider, frequency setting resistor, reference bypass capacitor should be tied directly to this pin. See the Applications Information section for recommendations on ground connections.
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UW
100
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Maximum Duty Cycle vs VSEC Voltage
16 15 14 13 12 11
GATE Clamp Voltage vs Temperature
125
30 0.8
1.2
1.6 2.0 2.4 VSEC VOLTAGE (V)
2.8
3.2
1950 G17
10 -50 -25
0
25
50
75
100
125
TEMPERATURE (C)
1950 G18
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LT1950
PI FU CTIO S
BLANK (Pin 9): The BLANK pin is used to adjust the leading edge blanking period of the current sense amplifier during FET turn-on. Shorting the BLANK pin to ground provides a default blanking period of approximately 110ns. A resistor from the BLANK pin to ground increases the blanking period up to 290ns for RBLANK = 75k. ISENSE (Pin 10): The ISENSE pin is the current sense input for the control loop. Connect this pin to the sense resistor in the source of the external power MOSFET. VIN2 (Pin 11): The VIN2 pin is the supply pin for the MOSFET gate drive circuit. Power can be supplied to this pin by an external supply such as VIN, and must exceed 8V (the undervoltage lockout threshold for the gate driver supply). For low VIN supply voltages an internal boost regulator can be used to generate as much as 11V at the VIN2 pin. This allows the LT1950 to run with VIN supply voltages down to 3V while still supplying enough gate drive for standard level MOSFETs. GATE (PIN 12): The GATE pin is the output of a high current gate drive circuit used to drive an external MOSFET. The output is actively clamped to a max voltage of 13V if VIN2 is supplied by a high voltage. PGND (Pin 13): This is the ground connection for the high current gate driver stage. See the Applications Information section for recommendations on ground connections. BOOST (Pin 14): The BOOST pin is the NPN collector output of the internal boost converter which can be used to generate an 11V supply for the MOSFET gate driver circuit. The boost converter runs with a fixed off-time of 0.5s and a current limit of 125mA. The converter runs until the VIN2 voltage exceeds 11V and then turns off until the VIN2 voltage drops below 10V. If the VIN2 voltage is supplied externally, the BOOST pin should be shorted to ground or left open. VIN (Pin 15): The VIN pin is the main supply pin for the LT1950. This pin must be closely bypassed to ground. If VIN2 is generated using the BOOST pin then the LT1950 will be fully functional, internal VREF will be active and the gate output will be enabled with a VIN voltage as low as 3V. An internal undervoltage lockout threshold exists at approximately 2.6V on the VIN pin. Undervoltage lockout voltages greater than 3V can be programmed using a voltage divider on the SHDN pin. VSEC (Pin 16): The VSEC pin is used to program the maximum duty cycle of the gate driver circuit. The maximum duty cycle will be equal to (105/VSEC)% for VSEC between 1.4V and 2.8V. This is a useful function to limit the flyback voltage in a forward converter. If the maximum duty cycle function is not used then the VSEC pin should be tied to ground.
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LT1950
BLOCK DIAGRA
1.32V 3A (TYPICAL 200kHz) SHDN 7 SYNC 4 ROSC 3 SLOPE 5 ERROR AMPLIFIER VOLTAGE GAIN = 85dB OSC (100-500)khz RAMP
S SLOPE COMP R
Q
BLANKING
1.23V
CURRENT SENSE CMP
0mV - >100mV 10 ISENSE 125mV
2 FB
1 COMP
8 GND
9 BLANK
1950 BD
Figure 1. LT1950 Block Diagram
OPERATIO
The LT1950 is a constant frequency, current mode controller for DC/DC forward, boost, flyback and SEPIC converter applications. The Block Diagram in Figure 1 shows all of the key functions of the IC. In normal operation, a VIN voltage as low as 3V allows an internal switcher at the BOOST pin to generate a separate
11V supply at VIN2 using a small surface mount external inductor, diode and capacitor. Since VIN2 supplies the output driver of the IC, this architecture achieves high GATE drive for an external N-channel power MOSFET even though VIN voltage is very low. High GATE drive capability reduces MOSFET RDS(ON) for improved efficiency,
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+
-
+
-
+
-
+
-
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VIN 15 VREF 6 VSEC 16 BOOST 14 VIN2 11 VIN2 VREF = INTERNAL + EXTERNAL SUPPLY 2.5V (SOURCE 2.5mA EXTERNALLY) SWITCHING PREREGULATOR FIXED OFF TIME (125mA CURRENT LIMIT) PGND (VIN2) (8V) U/V LOCKOUT DISABLE
+
11V
-
(VIN) (2.6V) U/V LOCKOUT 1.23V (105/VSEC)%
+
8V
-
-
+
+
MAX DC CLAMP
ENABLE
1A DRIVER
12 GATE 13 PGND
13V
BLANKING OVERRIDE CMP
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LT1950
OPERATIO
increases the range of MOSFETs that can be selected and allows applications requiring high gate drive with a large swing in VIN voltage. When VIN2 exceeds 8V, the GATE output driver is enabled. The GATE switches between 0V and VIN2 at a constant frequency set by a resistor from the ROSC pin to ground. When VIN2 reaches 11V, the internal switcher at the BOOST pin is disabled to save power and only re-enabled when VIN2 drops below 10V. The internal boost switcher runs in burst mode operation, asynchronous to the main oscillator. If low VIN operation with high GATE drive is not required, the BOOST pin is left open and the VIN2 pin shorted to VIN. With VIN2 shorted to VIN the minimum operational VIN voltage will increase from 3V to 8V (required at VIN2 to enable the GATE output driver). For GATE turn on, a PWM latch is set at the start of each main oscillator cycle. For GATE turn off, the PWM latch is reset when either the current sense comparator is tripped, the maximum duty cycle is reached, or the BLANK override threshold is exceeded. A resistor divider from the application's output voltage generates a voltage at the FB pin that is compared to the internal 1.23V reference by the error amplifier. The error amplifier output (COMP) defines the input threshold (ISENSE) of the current sense comparator. Maximum ISENSE voltage is clamped to 100mV. By connecting ISENSE to a sense resistor in series with the source of the external MOSFET, the peak switch current is controlled by COMP. An increase in output load current causing the output voltage to fall, will cause COMP to rise, increasing ISENSE threshold, increasing the current delivered to the output. This current mode technique means that the error amplifier commands current to be delivered to the output rather than voltage. This makes frequency compensation easier and provides faster loop response to output load transients. The current mode architecture requires slope compensation to be added to the current sensing loop to prevent subharmonic oscillations which can occur for duty cycles above 50%. Unlike most current mode converters which have a slope compensation ramp that is fixed internally, placing a constraint on inductor value and operating frequency, the LT1950 has externally adjustable slope
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compensation. A default level of slope compensation is achieved with the SLOPE pin open. Increased slope compensation can be programmed by reducing the value of resistance inserted between the SLOPE pin and VREF pin. A SYNC pin allows the LT1950 main oscillator to be synchronized to an external clock . To avoid loss of slope compensation during synchronization, the free running main oscillator frequency should be programmed to approximately 80% of the external clock frequency. The LT1950 can be placed into shutdown mode when the SHDN pin drops below an accurate 1.32V threshold. This threshold can be used to program undervoltage lockout (UVLO) at VIN for current limited or high source resistance supplies. SHDN pin current hysteresis also exists to allow external programming of UVLO voltage hysteresis. When VIN and VIN2 exceed internally set UVLO thresholds of 2.6V and 6.8V, the VREF output becomes active. The VREF output is a 2.5V reference supplying the majority of LT1950 control circuitry and capable of sourcing up to 2.5mA for external use. To prevent noise in the system causing premature turn off of the external MOSFET the LT1950 has leading edge blanking. This means the current sense comparator output is ignored during MOSFET turn on and for an extended period after turn on. The extended blanking period is adjusted by inserting a resistor from the BLANK pin to ground. A short to ground defines a minimum default blanking period. Increased resistance from the BLANK pin to ground will increase blanking duration. Fault conditions causing ISENSE to exceed 125mV will override blanking and reduce the ISENSE to GATE delay to 60ns. For applications requiring maximum duty cycle clamping, the VSEC pin reduces duty cycle for increased voltage on the pin. The VSEC pin provides a volt-second clamp critical in forward converter applications. Maximum duty cycle follows (105/VSEC)% for VSEC voltages between 1.4V to 2.8V. If unused, the VSEC pin should be shorted to ground, leaving the natural maximum duty cycle of the part to be typically 95% for 200kHz operation.
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LT1950
APPLICATIO S I FOR ATIO
LT1950 Input Supplies, VREF Output and GATE Enable VIN is the main input supply for the LT1950. VIN2 is the input supply for the LT1950 output driver. VIN2 can be provided by shorting the VIN2 pin to the VIN pin or by generating VIN2 using the BOOST pin. Waveforms of VIN, VIN2, VREF and GATE switching are shown in Figures 2 and 3. Figure 2 represents low VIN operation with VIN2 generated using the B00ST pin. Figure 3 represents VIN = VIN2 operation with the BOOST pin open circuit or shorted to ground. Low VIN Operation The LT1950 can be configured to provide a minimum of 10V GATE drive for an external N-channel MOSFET from VIN voltages as low as 3V, if the BOOST pin is used to generate a second supply at the VIN2 pin (see Figure 2 and Applications Information " Generating VIN2 Supply Using BOOST Pin"). The advantage of this configuration is that a lower RDS(ON) is achieved for the external N-channel MOSFET, improving efficiency, versus a controller running at 3V input without boosted gate drive. In addition, typical controllers running at low input voltages have the limitation of only being able to use logic level MOSFETs. The LT1950 allows a greater range of usable MOSFETs. This versatility allows optimization of the overall power supply performance and allows applications which would otherwise not be possible without a more complex topology. Figure 2 shows that for VIN above 2V, the internal switcher at the BOOST pin is enabled. This switch generates the VIN2 supply. As VIN2 ramps up above the undervoltage lockout threshold of 6.8V the 2.5V reference VREF becomes active and powers up internal control circuitry. When VIN2 exceeds approximately 8V, the gate driver is enabled. VIN2 is regulated between 10V and 11V, providing a supply to the LT1950 output driver to ensure a minimum of 10V drive at the GATE pin.
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VIN = VIN2 Operation If low VIN operation is not required below approximately 8V on VIN the LT1950 can be configured to run without the use of the BOOST pin by shorting the VIN2 pin to the VIN pin. Figure 3 shows that both VIN and VIN2 must now exceed 6.8V to activate the 2.5V VREF output and must exceed approximately 8V to enable the output driver (GATE pin).
12 8 4 0 VIN 4 3 2 1 0 BOOST LT1950 VIN2 C1 VIN2 GATE MIN 3V L1 D1
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50s/DIV
1950 F02
Figure 2. Low VIN Operation
10.2 8.5 6.8 5.1 3.4 5.0
VIN = VIN2
TYPICAL START-UP INPUT >8.2V
VREF 2.5 0 10 5 0 10s/DIV
VIN BOOST LT1950 VIN2 *
C1 GATE *BOOST PIN CAN BE LEFT OPEN OR SHORTED TO GROUND
1950 F03
Figure 3. VIN = VIN2 Operation
sn1950 1950fs
LT1950
APPLICATIO S I FOR ATIO
Shutdown and Undervoltage Lockout
Figure 4 shows how to program undervoltage lockout (UVLO) for the VIN supply. Typically, UVLO is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, hence source current increases as source voltage drops. This looks like a negative load resistance to the source and can cause the source to current limit or latch low under low source voltage conditions. An internally set undervoltage lockout (UVLO) threshold prevents the regulator from operating at source voltages where these problems might occur. An internal comparator will force the part into shutdown below the minimum VIN of 2.6V. This feature can be used to prevent excessive discharge of battery-operated systems. Alternatively, UVLO threshold is adjustable. The shutdown threshold voltage of the SHDN pin is 1.32V. Forcing the SHDN pin below this 1.32V threshold causes VREF to be disabled and stops switching at the GATE pin. If the SHDN pin is left open circuit, a permanent 3A flows out of the pin to ensure that the pin defaults high to allow normal operation. Voltages above the 1.32V threshold cause an extra 7A to be sourced out of the pin, providing current hysteresis. This can be used to set voltage hysteresis of the UVLO threshold using the following equations:
VH - VL 7A 1.32V R2 = (VH - 1.32V) + 3A R1 R1 =
VH = Turn on threshold VL = Turn off threshold
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Example: switching should not start until the input is above 11V and is to stop if the input falls below 9V. VH = 11V VL = 9V
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11V - 9V = 286k 7A 1.32V R2 = = 36k (11V - 1.32V) + 3A 286k R1 =
Keep the connections from the resistors to the SHDN pin short and make sure that the interplane or surface capacitance to the switching nodes are minimized. If high resistance values are used, the SHDN pin should be bypassed with a 1nF capacitor to prevent coupling problems from the switch node.
LT1950 VIN R1 3A 1.32V 7A VREF
+
C1 R2 GND
1950 F04
Figure 4. Undervoltage Lockout
Generating VIN2 Supply Using BOOST Pin The LT1950's BOOST pin is used to provide a "boosted" 11V supply at the VIN2 pin for VIN voltages as low as 3V. Since VIN2 supplies the output driver for the GATE pin of the IC, it is advantageous to generate a boosted VIN2. This architecture achieves high GATE drive for an external
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APPLICATIO S I FOR ATIO
N-channel power MOSFET even though VIN voltage is very low. High GATE drive voltage reduces MOSFET RDS(ON), improves efficiency and increases the range of MOSFETs that can be selected. A small switching regulator at the BOOST pin, with fixed current limit and fixed off time, generates the VIN2 supply. With an external inductor connected between the BOOST pin and VIN (see Figure 5), the BOOST pin will draw current until approximately 125mA is reached, turn off for 0.5s and then turn back on. The cycle is repeated for as long as the switcher is enabled. By using a diode connected from BOOST to VIN2 and a capacitor from VIN2 to ground, energy from the external inductor is transferred to the VIN2 capacitor during the offtime of the internal switcher. An auxiliary boost converter is realized providing a supply to the VIN2 pin. The typical inductor current, VIN2 voltage and BOOST pin voltage waveforms are shown in Figure 5. When VIN2 reaches 11V, the internal switcher is disabled. Since VIN2 supplies the output driver of the LT1950, switching at the GATE pin will eventually discharge the VIN2 capacitor until VIN2 reaches a lower level of approximately 10V. At this level the internal switcher is re-enabled and switches until VIN2 returns to
12 (V) 10 0.25 (A) 0 0.25 (A) 0 15 (V) 0 5s/DIV
1950 F05
VIN2 ID1
MIN 3V L1 VIN D1 BOOST LT1950 VIN2 C1
FREQUENCY (kHz)
IL1
BOOST
Figure 5. VIN2 Generation Using the BOOST Pin
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11V. This hysteretic (burst mode) operation for the internal switcher minimizes power dissipation from VIN. The VREF output is a 2.5V reference supplying most of the LT1950 control circuitry. It is available for external use with maximum current capability of 2.5mA. The pin should be bypassed to ground using a 0.1F capacitor. Internal undervoltage lockout thresholds for VIN and VIN2 of approximately 2.6V and 6.8V respectively must be exceeded before VREF becomes active. Programming Oscillator Frequency The oscillator frequency of the LT1950 is programmed using an external resistor connected between the ROSC pin and ground. Figure 6 shows typical fOSC vs ROSC resistor values. The LT1950 is programmable for a free-running oscillator frequency in the range of 100kHz to 500kHz. Stray capacitance and potential noise pickup on the ROSC pin should be minimized by placing the ROSC resistor as close as possible to the ROSC pin and keeping the area of the ROSC node as small as possible. The ground side of the ROSC resistor should be returned directly to the GND (analog ground) pin.
500 450 400 350 300 250 200 150 100 50 100 150 200 250 300 350 400 450 500 ROSC (k)
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Figure 6. Oscillator Frequency (fOSC) vs ROSC
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APPLICATIO S I FOR ATIO
Synchronizing The SYNC pin is used to synchronize the LT1950 main oscillator to an external clock. The SYNC pin can be driven directly from a logic level output, requiring less than 0.8V for a logic level low and greater than 2.2V for a logic level high. Duty cycle must be between 10% and 90%. When synchronizing the part, slope compensation will be reduced by approximately SYNC f/fOSC. If the reduction of slope compensation affects performance, RSLOPE can be reduced to increase slope compensation and reestablish correct operation. If unused, the pin is left open or shorted to ground. If left open, be aware that the internal pin resistance is 20k and board layout should be checked to avoid noise coupling to the pin. SLOPE COMPENSATION Programmability The LT1950 allows its default level of slope compensation to be easily increased by use of a single resistor connected between the SLOPE pin and the VREF pin. The ability to adjust slope compensation allows the designer to tailor his application for a wider inductor value range as well as to optimize the loop bandwidth. A resistor, RSLOPE, connected between the SLOPE pin and VREF increases the LT1950 slope compensation from its default level to as high as 3X of default. The curves in Figure 7 show the typical ISENSE maximum threshold vs duty cycle for various values of RSLOPE. It can be seen that slope compensation subtracts from the maximum ISENSE threshold as duty cycle increases from 0%. For example, with RSLOPE open, ISENSE max threshold is 100mV at low duty cycle, but falls to approximately 86mV at 80% duty cycle. This must be accounted for when designing a converter to operate up to a maximum load current and over a given duty cycle range. The application and inductor value will define the minimum amount of slope compensation. Refer to the
ISENSE MAX THRESHOLD (mV)
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Electrical Characteristics for 1X, 2X and 3X default slope compensation vs RSLOPE. Requirement in Current Mode Converters/Advantage of Adjustability The LT1950 uses a current mode architecture to provide fast response to load transients and to ease frequency compensation requirements. Current mode switching regulators which operate with duty cycles above 50% and have continuous inductor current, must add slope compensation to their current sensing loop to prevent subharmonic oscillations. (For more information on slope compensation see Application Note 19). Typical current mode switching regulators have a fixed internal slope compensation. This can place constraints on the value of the inductor. If too large an inductor is used, the fixed internal slope compensation will be greater than needed, causing operation to approach voltage mode. If too small an inductor is used, the fixed internal slope compensation will be too small, resulting in subharmonic oscillations. The LT1950 increases the range of usable inductor values by allowing slope compensation to be adjusted externally.
100 90 80 70 60 50 40 30 20 0 20 40 60 80 100
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RSLOPE = OPEN RSLOPE = 8k
RSLOPE = 3.3k
DUTY CYCLE (%)
Figure 7. ISENSE Maximum Threshold vs Duty Cycle
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APPLICATIO S I FOR ATIO
Programming Leading Edge Blank Time For PWM controllers driving external MOSFETs, noise can be generated during GATE rise time due to various parasitic effects. This noise can disturb the input to the current sense comparator (ISENSE) and cause premature turn-off of the external MOSFET. The LT1950 provides programmable leading edge blanking of the current sense comparator to avoid this effect. Blanking is provided in 2 phases: The first phase is during GATE rise time. GATE rise times vary depending on MOSFET type. For this reason the LT1950 automatically blanks the current comparator output until the "leading edge" of the GATE is detected. This occurs when the GATE voltage has risen within 0.5V of the output driver supply (VIN2) or has reached its clamp level of 13V. The second phase of blanking starts immediately after "leading edge" has been detected. This phase is programmable using a resistor (RBLANK) from the BLANK pin to ground. Typical values for this portion of the blanking period are 110ns at RBLANK = 0 up to 290ns at RBLANK = 75k. Figure 8 shows blanking vs RBLANK. Blanking duration can be approximated as:
R BLANKING (EXTENDED) = 110 + 60 * BLANK ns 25k
(AUTOMATIC) (DEFAULT) LEADING EDGE EXTENDED BLANKING BLANKING
GATE
RBLANK = 0
BLANKING 0 Xns (X + 110)ns [X + 110 + (60 * RBLANK/25k)]ns
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Figure 8. Blanking Timing Diagram
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Programming Volt-Second Clamp The VSEC pin is used to provide an adaptive maximum duty cycle clamp for sophisticated control of the simplest forward converter topology (single primary-side switch). This adaptive maximum duty cycle clamp allows the use of the smallest transformers, MOSFETs and output rectifiers by addressing the biggest concern in single switch forward converter topologies - transformer reset. The section "Application Circuits-Forward Converter Applications" covers transformer reset requirements and highlights the advantages of the LT1950 adaptive maximum duty cycle clamp. The programmable maximum duty cycle clamp is controlled by the voltage on the VSEC pin. As voltage on the VSEC pin increases within a specified range, maximum duty cycle decreases. By deriving VSEC pin voltage from the system input supply, a volt-second clamp is realized. Maximum GATE output duty cycle follows a 1/X relationship given by (105/VSEC)%. (see Maximum Duty Cycle vs VSEC Voltage graph in the Typical Performance Characteristics section). For example, if the minimum input supply for a forward converter application is 36V, the VSEC pin can be programmed with a maximum duty cycle of 75% at 1.4V. A movement of input voltage to 72V will lift the VSEC pin to 2.8V, resulting in a maximum duty cycle of 37.5%. As the section on Forward Converter Applications will show, transformer reset requirements are met with the
(PROGRAMMABLE) EXTENDED BLANKING CURRENT SENSE DELAY 0 < RBLANK < = 75k 60ns
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APPLICATIO S I FOR ATIO
ability of the VSEC pin to follow input voltage and control maximum switch duty cycle. Forward Converter Applications The LT1950 provides sophisticated control of the simplest forward converter topology (single primary switch, see Q1 Figure 11). A significant problem in a single switch forward converter topology is transformer reset. Optimum transformer utilization requires maximum duty cycles. Unfortunately as duty cycles increase the transformer reset time decreases and reset voltages increase. This increases the voltage requirements and stress on both transformer and switch. The LT1950 incorporates an adaptive maximum duty cycle clamp which controls maximum switch duty cycle based on system input voltage. The adaptive clamp allows the converter to operate at up to 75% duty cycle, allowing 25% of the switching period for resetting the transformer. This results in greater utilization of MOSFET, transformer and output rectifier components. The VSEC pin can be programmed from system input to adaptively control maximum duty cycle (see Applications Information "Programming Volt-Second Clamp" and the Maximum Duty Cycle vs VSEC Voltage graph in the Typical Performance Characteristics section).
100 95
EFFICIENCY (%)
90 85 80 75 70 VIN = 48V VOUT = 3.3V fOSC = 235kHz 0 5 10 15 LOAD CURRENT (A) 20
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Figure 9. LT1950-Based Synchronous Forward Converter Efficiency vs Load Current
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94% Efficient 3.3V, 20A Synchronous Forward Converter The synchronous forward converter in Figure 11 is based on the LT1950 and uses MOSFETs as synchronous output rectifiers to provide an efficient 3.3V, 20A isolated output from 48V input. The output rectifiers are driven by the LTC1698 which also serves as an error amplifier and optocoupler driver. Efficiency and transient response are shown in Figures 9 and 10. Peak efficiencies of 94% and ultra-fast transient response are superior to presently available power modules. In addition, the circuit in Figure 11 is an all-ceramic capacitor solution providing low output ripple voltage and improved reliability. The LT1950-based converter can be used to replace power module converters at a much lower cost. The LT1950 solution benefits from thermal conduction of the system board resulting in higher efficiencies and lower rise in component temperatures. The 7mm height allows dense packaging and the circuit can be easily adjusted to provide an output voltage from 1.23V to 15V. In addition, higher currents are achievable by simple scaling of power components. The LT1950based solution in Figure 11 is a powerful topology for replacement of a wide range of power modules.
LT1950 VOUT (100mV/DIV) POWER MODULE VOUT (100mV/DIV) 500s/DIV
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Figure 10. Output Voltage Transient Response to Load Steps (0A to 3.3A) LT1950 (Trace1) vs Power Module (Trace 2)
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LT1950
APPLICATIO S I FOR ATIO
COMP R1 4.7k LT1950 COMP FB ROSC SYNC SLOPE VREF SHDN GND VSEC VIN BOOST PGND GATE VIN2 ISENSE BLANK
+VIN R5 470k 16 15 14 13 12 11 10 9 R18 27k CS R2 4.7k UV R6 18k
10VBIAS R7 255 D1 BAS516 C4 1000pF C3 10nF
1 2
R17, 210k 3 4 C1 0.1F 5 6 7 R4, 18k R9 470k +VIN 8
CU1 1F
10VBIAS 100k UV 100k Q4 BC847BF C6 4.7F R3 4.7k D3 BAT760 0.1F
U4 HCPL-M453 6 5 4 1 2 3 +V01
COMP
Figure 11. 36V to 72V Input to 3.3V at 20A Synchronous Forward Converter
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+VIN 36V TO 72V INPUT -VIN 10VBIAS 8 1 U2A LTC1693-1 7 2 D2 BAT760 Q2 Si7380 2x Q3 Si7380 2x CIN 2.2F 100V X5R T1 STG-0313W L1 C.PI-1365-1R2 +V01 3.3V 20A C01 100F X5R 4x Q1 Si4490 FG CG 47 CS 10VBIAS 6 3 U2B LTC1693-1 5 4 220pF 1F X5R T2 SYNC 560 R13 270 C9, 33nF R14 1.2k CG RS 0.015 7VBIAS 1 2 3 4 5 6 7 8 VDD CG PGND GND OPTO VCOMP MARG LTC1698 FG SYNC VAUX ICOMP +ISNS -ISNS PWTOK 16 15 14 13 12 11 10 9 0.1F FG SYNC VFB=1.233V OVP R15 4.7k R16 2.8k
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LT1950
APPLICATIO S I FOR ATIO
High Efficiency, Isolated 26V 5A Output, Nonsynchronous Forward Converter
Figure 13 illustrates a nonsynchronous forward converter based on the LT1950 to provide a highly efficient, 26V 5A isolated output from 48V input. The LT1950-based converter using a single switch topology and utilizing the LT1950s adaptive maximum duty cycle clamp is a simple and highly optimized solution. Peak efficiencies of 92.8% (Figure 12) are achievable. Transformer and inductor are standard components. The quarter brick sized DC/DC converter (2.3" by 1.45") delivers over 125W and is only 0.4" high. The 26V converter can be used as a "front line" (isolating) converter in telecom systems with multiple outputs.
EFFICIENCY (%)
+VIN 36V TO 72V INPUT -VIN
CIN 2.2F 100V X5R
10V BIAS +VIN 6.8k 5 6 0.1F 3 210k 9 27k 4 2 1 ROSC BLANK SYNC FB COMP LT1950 SLOPE VREF VIN VIN2 VSEC SHDN GATE ISENSE GND PGND 15 11 16 7 12 10 8 13 0.015 18k 330R 470k
1
2 OC1
1F
Figure 13. 36V to 72V Input to 26V at 5A Nonsynchronous Forward Converter
+
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94 93 92 91 90 89 88 87 86 85 84 1 2 VIN = 48V VOUT = 26V fOSC = 235kHz 4 3 LOAD CURRENT (A) 5
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Figure 12. LT1950-Based Nonsynchronous Forward Converter Efficiency vs Load Current (Figure 13 Circuit)
T1 PA0581 47H 232k 47F 24.9k
+VOUT
470pF
18k
Si7450
5
4 U3 3 LT1797 47k 1F
FMMT625 22k 8.2V
U2 LT1009
1950 F13
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LT1950
APPLICATIO S I FOR ATIO
+VOUT R1 10.5k C1 2200pF R3 18k
1 2 3
COMP FB ROSC
R4 133k R2 1.21k
R5 SYNC 16.2k 5 SLOPE 6 VREF 7 C2 SHDN 0.1F 8 GND R7 71.5k
4
R6 35.7k
Figure 14. 4V to 36V Input, 12V/1.5A Automotive SEPIC Converter
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3.3V BIAS C3 4.7F 16V CIN 10F 50V TDK L2* VIN 4V TO 36V LT1950 VSEC VIN BOOST PGND GATE VIN2 ISENSE BLANK 16 15 14 13 12 11 10 9 R9, 47 C6 0.01F R8 47k C4 4.7F 16V D2 BAS516 L1 4.7H C5 10F D1 50V MBRD660CT Q1 Si7456 L3* R10 0.010 +VOUT 12V, 1.5A COUT 47F, 16V X5R, TDK x4 VIN *L2, L3 (COUPLED INDUCTORS) VP5-0155
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LT1950
PACKAGE DESCRIPTIO
.254 MIN
.0165 .0015
RECOMMENDED SOLDER PAD LAYOUT 1 .015 .004 x 45 (0.38 0.10) .007 - .0098 (0.178 - 0.249) .016 - .050 (0.406 - 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0 - 8 TYP .053 - .068 (1.351 - 1.727) 23 4 56 7 8 .004 - .0098 (0.102 - 0.249)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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GN Package 16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.045 .005 .189 - .196* (4.801 - 4.978) 16 15 14 13 12 11 10 9 .009 (0.229) REF .150 - .165 .229 - .244 (5.817 - 6.198) .150 - .157** (3.810 - 3.988) .0250 TYP .008 - .012 (0.203 - 0.305) .0250 (0.635) BSC
GN16 (SSOP) 0502
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LT1950
RELATED PARTS
PART NUMBER LT1534 LT1619 LT1681/LT3781 LTC1693 LTC1698 DESCRIPTION Ultralow Noise 2A Switching Regulator Low Voltage Current Mode Controller Dual Transistor Synchronous Forward Controller High Speed MOSFET Driver Secondary Synchronous Rectifier Controller COMMENTS Reduces Conducted and Radiated EMI, Low Switching Harmonics, 20kHz to 250kHz Switching Frequency 1.9V VIN 18V, 300kHz Operation, Boost, Flyback, SEPIC Operation Up to 72V Maximum 1.5A Peak Output Current, 16ns Rise/Fall Time at VCC = 12V, CL = 1nF Use with the LT1950 or LT1681, Isolated Power Supplies, Contains Voltage Margining, Optocoupler Driver, Synchronization Circuit with the Primary Side No Optoisolator Required, Accurate Regulation Without User Trims, 50kHz to 250kHz Switching Frequency, SSOP-16 Package Operation as Low as 2.5V Input, Boost, Flyback, SEPIC 8V to 48V Supply Range, Protected -15V to 60V Supply Transient Synchronous, Single Inductor, No Schottky Diode Required 2.5V VIN 36V, No RSENSE Current Mode Operation, Excellent Transient Response
LT1725 LTC1871 LT1910 LTC3440 LTC3704
General Purpose Isolated Flyback Controller Wide Input Range, No RSENSETM Controller Protected High Side MOSFET Driver Micropower Buck-Boost DC/DC Converter Positive-to-Negative DC/DC Controller
No RSENSE is a trademark of Linear Technology Corporation.
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
LT/TP 0503 1K * PRINTED IN USA
FAX: (408) 434-0507 q www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2003

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